Camera Level Parameters
Control within the camera is accomplished thru programmable logic devices (PLD’s). With these devices, process and timing control logic, normally requiring a high-speed CPU, can be created using an external computer and software tool. This PLD logic is then down loaded to camera’s non-volatile memory, NVRAM, reducing chip count and processing overhead of a CPU based system. All engineering-level software-definable parameters are retained in the camera’s NVRAM, and during power cycling. Camera software setup is typically done once, and something the user would not normally be concerned with. It is possible however for the user via a GUI, to access this logic and modify the following parameter:
• CCD clock waveform patterns and timing - define and download these waveforms.
• CCD clock waveform voltages. Levels for CCD bias voltages and for clock waveforms are set independently of the waveform patterns. In addition, these voltages can be adjusted manually through a simple control interface in the camera.
• Video processing waveform patterns and timing - define and download these waveforms.
• Parameters controlling high-speed background level measurement.
• Fast pixel skipping. The camera can rapidly read and discard CCD pixels outside the imaging.
• Frame-transfer operation. The camera can read out the full CCD or can be used in frame-transfer mode.
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Last update: January 6, 2003